Documentación de herramientas de desarrollo Intel® FPGA

Esta colección proporciona la documentación de software de Intel® Quartus® y otras herramientas de desarrollo de FPGA.

{"limitDisplayedContent":"showAll","collectionRelationTags":{"relations":{"OR":["etm-D240C377-263B-4C70-A4EA-0E452D0182CA","etm-82D283B3-AD12-4BA5-A7C6-BDEF1DCFD8FC"],"EXCLUDE":["etm-f6e0d09943a943d383e81b5f64a3956c","etm-98109f19d4f24b6dad7442422a995aee","etm-85359f0a0aab4fb7aa2d7721c3203376"]},"featuredIds":[]},"collectionId":"649629","resultPerPage":50.0,"filters":[{"facetId":"guidetmD240C377263B4C70A4EA0E452D0182CA","field":"stm_10385_es","type":"hierarchical","basePath":"Primary Content Tagging","displayName":"Intel Quartus Software","deprecated":false,"rootFilter":"guidetmD240C377263B4C70A4EA0E452D0182CA","rootPath":["Primary Content Tagging","Intel® FPGA","Software Intel® Quartus®"],"position":0},{"facetId":"guidetm82D283B3AD124BA5A7C6BDEF1DCFD8FC","field":"stm_10385_es","type":"hierarchical","basePath":"Primary Content Tagging","displayName":"Software adicional","deprecated":false,"rootFilter":"guidetm82D283B3AD124BA5A7C6BDEF1DCFD8FC","rootPath":["Primary Content Tagging","Intel® FPGA","Software Intel® Quartus® - adicionales"],"position":1},{"facetId":"guidetm83741EA404664A899395C861EDA3D38B","field":"stm_10385_es","type":"hierarchical","basePath":"Primary Content Tagging","displayName":"Familia de dispositivos Intel FPGA","deprecated":false,"rootFilter":"guidetm83741EA404664A899395C861EDA3D38B","rootPath":["Primary Content Tagging","Intel® FPGA","Dispositivos programables Intel®"],"position":2},{"facetId":"ContentType","type":"ContentType","deprecated":true,"name":"ContentType","position":3},{"facetId":"guidetmf9d7dfc351e346749753c4d94339dd83","field":"stm_10355_es","type":"hierarchical","basePath":"Subject","displayName":"Asunto: Flujo de diseño","deprecated":false,"rootFilter":"guidetmf9d7dfc351e346749753c4d94339dd83","rootPath":["Subject","Diseño","Diseño de FPGA","Flujo de diseño de sofware Intel® Quartus"],"position":4},{"facetId":"lastupdated","type":"lastupdated","deprecated":true,"name":"lastupdated","position":5}],"coveoRequestHardLimit":"1000","accessDetailsPagePath":"/content/www/us/en/secure/design/internal/access-details.html","cardView":false,"sorting":"Newest","defaultImagesPath":"/content/dam/www/public/us/en/images/uatable/default-icons","coveoMaxResults":5000,"fpgaFacetRootPaths":"{\"fpgadevicefamily\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Programmable Devices\"],\"quartusedition\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Quartus Software\"],\"quartusaddon\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Quartus Software - Add-ons\"],\"fpgaplatform\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® FPGA Platforms\"]}","newWrapperPageEnabled":true,"descendingSortingForNumericalFacetsName":"[\"Intel® Quartus® Prime Pro Edition\",\"Intel® Quartus® Prime Lite Edition\",\"Intel® Quartus® Prime Standard Edition\",\"Quartus® II Subscription Edition\",\"Quartus® II Web Edition\"]","columnsConfiguration":{"idColumn":true,"dateColumn":true,"versionColumn":true,"contentTypeColumn":false,"columnsMaxSize":0},"dynamicColumnsConfiguration":[{"name":"DynamicColumn_id","type":"id","gtv":"ID","width":60,"selected":true},{"name":"DynamicColumn_date","type":"date","gtv":"Fecha","width":60,"selected":true},{"name":"DynamicColumn_version","type":"version","gtv":"Versión","width":135,"selected":true}]}

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