Intel® Stratix® 10 MX FPGA

Intel® Stratix® 10 MX FPGA is the essential multi-function accelerator for high performance computing (HPC), data center, virtual networking functions (NFV), and broadcast applications. These devices combine the programmability and flexibility of Intel® Stratix® 10 FPGAs and SoCs with 3D stacked high-bandwidth memory 2 (HBM2). The Intel® Hyperflex™ FPGA Architecture enables high-performance core fabric that can efficiently utilize the bandwidth from the in-package memory tile. The DRAM memory tile is physically connected to the FPGA using Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) technology.

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Intel® Stratix® 10 MX FPGA

FPGA Intel® Strantix® 10 MX

View Intel® Stratix® 10 MX FPGAs and find product specifications, features, applications and more.

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Nombre del producto
Estado
Fecha de lanzamiento
Elementos lógicos (EL)
Bloques de procesamiento de señal digital (DSP, por sus siglas en inglés)
Máxima memoria integrada
Opciones de paquete
Precio
Intel® Stratix® 10 MX 2100 FPGA Launched 2017 2073000 3960 239.5 Mb F2597, F2912
Intel® Stratix® 10 MX 1650 FPGA Launched 2017 1679000 3326 223.5 Mb F2597, F2912

Features & Benefits

Applications

Chip-Level Integration Using EMIB

An innovative Embedded Multi-Die Interconnect Bridge (EMIB) packaging technology, developed by Intel, enables effective in-package integration of system-critical components such as analog, memory, ASICs, CPU, etc. EMIB offers a simpler manufacturing flow compared to other in-package integration technologies. EMIB eliminates the use of through silicon vias (TSV) and specialized interposer silicon. The result is highly integrated, system-in-package products that offer higher performance, less complexity, and superior signal and power integrity. Additional information about Intel’s EMIB technology can be found on the Intel Custom Foundry website located at http://www.intel.com/content/www/us/en/foundry/emib.html

Conventional Approach

  • Chip-to-chip bandwidth is limited.
  • System power is too high.
  • Form factor is too big.

Heterogeneous SiP Approach

  • Higher bandwidth.
  • Lower power.
  • Smaller form factor.
  • Increased functionality.
  • Ability to mix process nodes.

Memory

FPGAs with Near Memory in Package

Intel's near memory solutions integrate high-density DRAM close to the FPGA, within the same package. In this configuration, the in-package memory is accessible significantly faster, up to 10X higher bandwidth when compared to traditional main memory. A near-memory configuration also reduces system power by reducing traces between the FPGA and memory, while also reducing board area.

DRAM system-in-package (SiP) solutions leverage high-bandwidth memory 2 (HBM2) to eliminate memory bandwidth bottlenecks in high-performance systems that are processing an ever-increasing amount of data; including data center, broadcast, wireline networking, and high-performance computing systems.

HBM2 DRAM

HBM2 DRAM is a 3D memory that vertically stacks multiple DRAM die using through silicon via (TSV) technology. Compared to discrete DDR-based solutions, HBM2 DRAM provides higher memory bandwidth, lower system power, and smaller form factor, thereby providing the best bandwidth/watt.

Intel® Stratix® 10 MX devices integrate HBM2 tiles alongside a high-performance monolithic 14 nm FPGA die to offer over 10X higher memory bandwidth relative to discrete DRAM solutions.